NVIDIA is seeking an ASIC Design Engineer for a New College Grad class of 2026. Based in Santa Clara, CA, you will contribute to high-performance GPUs and SoCs, working through RTL design, verification and timing challenges.
You will collaborate with architects, verification, synthesis and back-end teams to deliver robust IPs such as schedulers, DMAs and controllers. The role emphasizes system-level understanding, micro-architecture, and hand-on RTL work with Verilog and scripting languages.
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