NVIDIA Corporation in Santa Clara, CA seeks an ASIC Design Engineer at the New College Graduate level to implement high-performance RTL for leading SoCs and GPUs. You will analyze trade-offs, craft micro-architecture, and collaborate across verification, synthesis, and back-end teams on IPs like schedulers and DMA engines.
The role requires a BS/MS in EE/CE/CS or related field, with strong Verilog RTL experience and good teamwork.
#J-18808-LjbffrNew Grad ASIC Design Engineer – GPU/SoC, Equity Eligible in santa clara at Unknown Company
This position is listed as full time and onsite.