Broadcom Inc. in Chandler, AZ is seeking an experienced Mixed-Signal Analog Design Engineer to join our Central Engineering Group. In this role, you will design on-die PVT monitoring IP across leading process nodes.
You will lead circuit design and verification, supervise layouts, build Verilog models, and deliver datasheets and integration documents while supporting post‑silicon bring-up and validation.
#J-18808-LjbffrMixed-Signal IP Design Engineer — Silicon Bring-Up in chandler at Unknown Company
This position is listed as full time and onsite.