Memory Subsystem Verification Engineer (UVM/Verilog)

Qualcomm Technologies, Inc. is seeking a motivated Design Verification Engineer to join its memory subsystem verification team.

You will develop verification strategies for memory controllers, DDR/LPDDR/HBM interfaces, and PHY-related logic, and execute simulations using UVM-based testbenches. The role involves creating assertions, driving functional and code coverage closure, and collaborating with RTL, architecture, and modeling teams to ensure verifiability and design correctness across