NVIDIA seeks a senior IO power optimization engineer to drive design for high-speed interconnects like NVLink and NVLink-C2C. You will own IO power management, energy efficiency, and interoperability across complex topologies.
Requires a BS/MS in EE/CE with 10+ years, plus strong leadership and cross-team collaboration skills. The role offers equity and comprehensive benefits with a competitive base salary.
#J-18808-LjbffrLow-Power IO/Interconnect Architect for GPU/SOC in santa clara at Unknown Company
This position is listed as full time and onsite.