Neuralink seeks experienced engineers for a Digital IC Design Engineer Intern role focused on next-generation chip architectures and hardware accelerators. You will collaborate with chip designers, electrical engineers, algorithms engineers, and software engineers on a compact, agile team to push the boundaries of energy efficiency and silicon technology.
The position emphasizes hands-on RTL, micro-architecture, and verification work, with opportunities to influence silicon bring-up and test
#J-18808-LjbffrLow-Power Digital IC Design Engineer Intern in south san francisco at Unknown Company
This position is listed as full time and onsite.