A leading high-frequency trading firm is seeking a Verification Engineer to verify complex low-latency FPGA systems. You will design and maintain testbenches, develop comprehensive verification plans, and oversee the test infrastructure. Ideal candidates will have strong debugging capability, proficiency in Python, and hands-on expertise in SystemVerilog and UVM. Join a team at the forefront of innovation in verification, supported by pioneers in open-source hardware tools.
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Low-Latency FPGA Verification Engineer in austin at Unknown Company
This position is listed as full time and onsite.