Cadence Design Systems seeks a verification professional to define the overall verification strategy and architecture for complex SoC projects. You will design scalable testbenches, BFMs, monitors, scoreboards, and checkers, while leading debugging and root-cause analysis with design teams.
You will drive constrained-random testing and formal verification to improve coverage and quality. With 4–7 years of DV experience, you will mentor juniors, collaborate across design, architecture, and
#J-18808-LjbffrLead Verification Architect in austin at Unknown Company
This position is listed as full time and onsite.