Apple Inc. in Cupertino seeks a SoC DRAM Memory Subsystem Validation Engineering Program Manager to lead memory readiness for our custom SoCs.
You will drive bring-up, validation and complex debug across multi-functional teams, shaping the DRAM roadmap and coordinating with DRAM architecture and DV groups. The role interfaces with Memory Controller Design, DDR PHY, DRAM product engineering, and software teams to ensure high-quality silicon delivered to mass production, while meeting Apple’s
#J-18808-LjbffrLead SoC DRAM Memory Validation Program Manager in cupertino at Unknown Company
This position is listed as full time and onsite.