Lead SoC Design Verification Architect

Veriipro in Santa Clara, California is looking for a Principal Design Verification Engineer to oversee verification activities for complex SoC designs. The successful candidate will architect advanced verification environments and create test plans while collaborating with cross-functional teams to ensure quality silicon delivery.

You will lead verification efforts, develop automation tools, and mentor junior engineers in a fast-paced environment. Required qualifications include a Bachelor's degree and substantial experience in design verification.