Synopsys is seeking a senior engineer specializing in high-speed SerDes SIPI across PCIe Gen6/7/8, E224G, E448G, and CXL interfaces. You will own end-to-end signoff, mentor teams, and collaborate with cross-functional groups to ensure robust signal integrity in complex systems.
You will model, simulate, and measure with tools like HSPICE, HFSS, and Sigrity; drive lab correlation, fixture design, and documentation, while influencing architecture and reusable methodologies across programs.
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