Astera Labs, based in San Jose, CA, seeks a Principal SerDes Bring-up Validation Engineer to lead end-to-end post-silicon bring-up, validation, and characterization for high-speed PHYs. You will build automation, collaborate across AMS design, firmware, and system teams, and drive data-driven optimization of performance and reliability.
You will design and execute bring-up plans, develop test objectives and pass/fail criteria, and mentor across disciplines to accelerate time-to-data and improve
#J-18808-LjbffrLead SerDes Bring-Up & Validation Engineer in san jose at Unknown Company
This position is listed as full time and onsite.