TylSemi in San Jose is seeking a Principal Mixed Signal RTL Design Engineer to lead silicon-level RTL for intelligent power optimization in AI/HPC applications. You will translate control models to high-quality HDL, design DPWM modules, and collaborate with analog teams on loop compensation and sensor effects.
This role requires strong power-management IC experience and a track record in high-performance mixed-signal design.
#J-18808-LjbffrLead Mixed-Signal RTL Design Engineer for AI Power ICs in san jose at Unknown Company
This position is listed as full time and onsite.