MaxLinear, Inc. is seeking a Senior Principal Digital Design Engineer in California to lead digital design of advanced SoCs. You will define microarchitectures, translate PCIe/Ethernet standards into RTL, and collaborate across DV, PD, and firmware teams for architecture, PPA, and execution plans.
The role requires deep experience with SystemVerilog, UVM-based verification, and end-to-end ASIC front-end flow, including power and timing closure. Strong leadership and communication are essential.
#J-18808-LjbffrLead Digital Design Architect for High-Speed SoCs in irvine at Unknown Company
This position is listed as full time and onsite.