Job PostingFull time, direct hire role at client (semiconductor company)Lead verification efforts on PCIe IPs and SoC productsArchitect and build system and unit-level UVM verification environmentWork with architects to define verification strategy and execution plansReview metrics and deliver task with high qualityAnalyze Functional, Code, and Test Plan CoverageDrive and participating in Code ReviewsIdentify, drive, and develop efficiency and IP quality improvement initiativesDrive root cause analysis and corrective actions for Functional bugs found in SiliconDrive projects from start to the finish and conduct Design verification sign-offMinimal QualificationsMaster's degree in Electrical Engineering or related field5 years of industrial experience in Design VerificationProficiency in SystemVerilog and Object-Oriented ProgrammingExperience in UVM, SVA, VIP, DPIUnderstand verification best practicesExperience in PCIe protocol stackProficient scripting language in one of: Python, TCL, Shell, PerlSelf-motivated team workerPreferred QualificationsExperience of overall design verification experience in the ASIC industryExperience in a design verification lead or management roleStrong background in the development of verification environments in System VerilogExpertise in constrained random verification methodologies.Formal verification experience a plusExtensive experience verifying complex designs using UVMExperience in CXL, AXI, AHB, USB, I2C, Ethernet