Lead CPU Core Verification Testbench

Tenstorrent is seeking a senior CPU verification engineer to own core-level testbench development for high‑performance out-of-order RISC-V cores. Hybrid role based in Austin, TX or Santa Clara, CA, with global collaboration across DV and post-silicon teams.

You will lead the CVM-based verification strategy, develop UVM and C++ models, and advance AI-assisted debugging workflows to accelerate issue triage and coverage. The position offers growth across multiple seniority levels.