Lead ASIC Verification Engineer — Networking & SoC

Advanced Micro Devices in Santa Clara seeks a Design Verification Engineer to drive verification closure on complex ASIC designs. The ideal candidate will have expert knowledge in SystemVerilog and UVM, and will work collaboratively across teams to ensure product success.

Responsibilities include developing testbench architectures, executing verification plans, and optimizing methodologies. A Bachelor’s degree in Electrical/Computer Engineering is required, while a Master’s degree is preferred.