Etched is seeking a Design Verification Engineer to join the Interface IP DV team in Austin, with hybrid collaboration across San Jose. You will verify IP subsystems, ensure correctness across the hardware-software stack, and tackle challenging verification tasks in a fast-paced startup setting.
You will own verification of multiple IP subsystems, develop scalable testbenches, and collaborate with RTL, software, and emulation teams to ensure robust integration and performance across the chip
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