Interface Design Verification Engineer

Interface Design Verification EngineerLooking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc.Key Responsibilities:Verify interface IPs for protocol compliance and robustnessDevelop UVM testbenches using VIPsExecute corner-case and stress testingAnalyze protocol-level failures and debug issuesWork with design teams to ensure spec complianceRequired Skills:Strong knowledge of standard protocols (PCIe/DDR/USB/Ethernet)Expertise in System Verilog, UVM, and VIP integrationExperience with protocol analyzers and debuggingGood to Have:Experience in high-speed interfaces