Interconnect Design Engineer: TileLink & Coherence Expert

SiFive, Inc. is looking for a staff level hardware engineer to design industry-leading CPU and interconnect IP. You will work in a dynamic environment, building multiple CPU lines and TileLink interconnects.

This role requires strong expertise in cache architectures and hardware design, with additional skills in software engineering. The position offers a competitive base pay ranging from $158,760 to $194,040, along with a comprehensive benefits package.