Tenstorrent is seeking a Timing Engineer to drive static timing analysis and closure for high-performance AI CPUs and SoCs. You will collaborate with logic, DFT, and physical design teams to debug constraints, optimize timing paths, and ensure performance targets across corners and modes.
The role is hybrid, based in Austin, TX, Fort Collins, CO, or Santa Clara, CA, with offers aligned to experience level. Strong scripting in Python, Perl, and TCL, plus SPICE/OCV experience, are valued.
#J-18808-LjbffrHybrid Senior Timing Engineer: Silicon STA & Closure in co at Unknown Company
This position is listed as full time and hybrid.