Realign Llc in San Jose, CA is seeking an experienced Hardware Engineer to lead high-speed complex hardware design and failure analysis. You will work on networking products with SERDES >25G, PCIe Gen5+, DDR5 and NVMe/PCIe interfaces, and contribute to power supply architectures.
You will perform board bring-up, hardware validation, and qualification testing. Candidates should have 8+ years of hands-on hardware design experience, Cadence CAD workflows, and strong SI/PI skills.
#J-18808-LjbffrHigh-Speed Hardware Engineer — PCIe Gen5 & Failure Analysis in san jose at Unknown Company
This position is listed as full time and onsite.