Qualcomm Technologies International Ltd seeks a Staff Engineer level Server CPU Clock Physical Design Engineer in Cambridge to drive clock generation and distribution for next-generation data center CPUs. You will work with microarchitecture, RTL, CAD, and physical design teams on clocking requirements and signoff strategies.
The role emphasizes low-skew, low-power clock networks and coordination across PMU/PLL teams, with opportunities to influence methodology and signoff.
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