HBM SoC Physical Design Engineer — Netlist to Tape-Out

Micron Technology in Folsom, CA is seeking an experienced SoC Physical Design Engineer to drive implementation of advanced memory-centric designs from netlist to GDSII. You will collaborate with RTL, DFT, IP, packaging and manufacturing to deliver strong PPA and robust tape-out signoff across multiple generations.

This hands-on role emphasizes timing closure, power integrity and flow automation using industry tools, with opportunities to own blocks or top-level integration.