Hardware Test Engineer

• 4+ years of EE hardware validation experience with strong emphasis on Power Integrity (PI) and Signal Integrity (SI).
• Proven ability to analyze test data, identify root causes, and drive issues to closure with cross-functional teams.
• Experience reviewing test reports for correctness, identifying gaps, and driving follow-up actions.
• Ability to develop test procedures for execution by others, including clear technical writing, structured SOPs, and annotated diagrams.
• Strong schematic reading skills, including tracing signal paths, understanding power distribution, and mapping circuit functions from schematics and datasheets.
• PCB layout review experience, including assessment of probe access, SI/PI risks, and debug strategy.
• Expert-level knowledge of lab instruments, including high-bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, and spectrum analyzers.
• Experience with DC-DC converter characterization and high-speed digital signal measurements.
• Solid understanding of transmission line theory, impedance matching, and flex PCB signal integrity challenges.
• Strong communication skills with the ability to explain complex EE issues clearly to CM teams and design partners.

Preferred Qualifications:

• Experience working with CMs or ODMs in a validation support capacity.
• Experience with wearable, mobile, or IoT hardware, particularly space-constrained and low-power designs.
• Familiarity with RF measurements, including BLE/WiFi TX power, sensitivity, and antenna return loss.
• Familiarity with proto/EVT/DVT/PVT build cycles and NPI environments.
• Experience with issue-tracking systems and cross-functional coordination in hardware programs.

Technical Knowledge Required:

Power Integrity (PI)

Signal Integrity (SI)

• High-speed interface measurement: MIPI CSI, SPI, I2C, I2S/PDM, USB, and UART.

Schematic & Layout Competency

• Review PCB layouts (rigid and flex) to identify optimal probe locations and debug access points.