Qualcomm Technologies, Inc. is seeking a Design Verification Engineer to drive memory subsystem verification, including memory controllers, DDR/LPDDR/HBM interfaces, and PHY logic.
You will develop and execute verification strategies, build UVM-based testbenches, and write assertions, covering multiple modes and addressing complex verification challenges. The role requires strong Verilog/SystemVerilog/UVM skills, experience with constrained-random verification, and collaboration with RTL,
#J-18808-LjbffrHands-On Memory Subsystem Verification Engineer in santa clara at Unknown Company
This position is listed as full time and onsite.