Apple Inc. in Santa Clara, CA seeks a Graphics Cache Hierarchy Verification Engineer to drive pre-silicon RTL verification of graphics memory subsystems and related units.
You will design verification plans, build reusable test benches, and generate directed and constrained tests to ensure robust performance. The role requires a strong background in CPU/GPU architecture, SystemVerilog verification, HDL simulators, and UVM-style methodologies, collaborating across blocks to achieve comprehensive
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