AMD in San Jose, CA is seeking a Front-End Verification Engineer to validate the functional correctness of next-generation AMD/Xilinx devices. You will work across a multi-site global team, driving verification from feature definition through silicon readiness.
The role emphasizes collaboration, strong analytical skills, and ownership of complex verification challenges, with hands-on work in SystemVerilog/UVM, RTL debugging, and test bench development.
#J-18808-Ljbffr