FPGA RTL Design And Board ValidationWe are seeking a highly skilled Senior FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and development, and FPGA validation and testing. The ideal candidate will have a strong background in design debugging and a deep familiarity with Quartus tools. This role requires a detail oriented individual who can effectively contribute to software development projects while ensuring high quality deliverables.Key Responsibilities:Design and develop RTL for FPGA applications, ensuring adherence to project specifications and timelines.Conduct thorough design debugging to identify and resolve issues in the design process.Perform FPGA validation and testing to ensure functionality and performance meet required standards.Utilize Quartus tools for design synthesis, simulation, and implementation.Collaborate with cross functional teams to integrate IP designs into larger systems.Qualifications:7yr to 15 yr in FPGA RTL design, Verification and board level ValidationShould have worked in SV- UVM, Verilog, VHDLProtocol knowledge: AXI, PCIe, EthernetDesign and debug using Quartus tool is a mustShould have done board debug in LabShould have working experience in using lab equipments like LA, CRO*** is an Equal Employment Opportunity employer.
We promote and support a diverse workforce at all levels of the company. All qualified applicants will receive consideration for employment without regard to race, religion, color, sex, age, national origin, or disability. All applicants will be evaluated solely based on their ability, competence, and performance of the essential functions of their positions with or without reasonable accommodations.
Reasonable accommodations also are available in the hiring process for applicants with disabilities. Candidates can request a reasonable accommodation by contacting the company ADA Coordinator.