PHASER Hardware San Francisco, CA Full-time Mid-Senior
Write the gateware that programs PHASER's modulators and turns detector samples into results.
What you’ll do
- Develop FPGA designs for modulator control and readout
- Build host interfaces and drivers
- Verify timing and throughput against the system budget
What you’ll bring
- Experience with Verilog/SystemVerilog or VHDL
- High-speed serial interfaces
- Hardware verification practice
Nice to have
- Real-time signal processing
About TensaCo
TensaCo builds the compute and software that make AI faster, more efficient and accountable: PHASER, an optical approach to AI acceleration, and TensorCode, software for AI teams can check, correct and own.
TensaCo is an equal opportunity employer. We consider all qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other protected characteristic.
#J-18808-LjbffrFPGA Engineer PHASER in san francisco at Unknown Company
This position is listed as full time and onsite.