FPGA Design Engineer: RTL-to-Silicon Prototyping

Normal Computing seeks an FPGA Design Engineer to bridge RTL and physical silicon, enabling pre-silicon validation and early software development on FPGA platforms. You will select hardware, implement RTL, debug in the lab, and build the software stack around the hardware for automated testing and regression.

You will collaborate with silicon, EDA, and research teams to ship PCIe-based accelerators and post-silicon validation infrastructure, driving robust hardware-software integration.