• Strong Verilog HDL and RTL design expertise.
Read on to fully understand what this job requires in terms of skills and experience If you are a good match, make an application.
• Good knowledge of CDC, reset design, pipelining, FIFO/memory, and synchronization.
• Experience with FPGA tools like Vivado, Quartus, Libero, Questa/ModelSim. xhqgsiq
• Strong understanding of STA, timing constraints, timing closure, and clock architecture.
• Hands-on experience in FPGA hardware bring-up and debugging
Field-Programmable Gate Arrays Engineer in raleigh at Unknown Company
This position is listed as full time and onsite.