We are seeking a detail-oriented and technically adept Program Manager to drive complex ASIC development programs in a design-heavy fabless environment. This role requires deep engagement with foundries, design teams, and program management, ensuring seamless execution from project charter through tapeout, silicon validation, and production readiness.
The ideal candidate thrives in high-complexity, high-dependency programs, is comfortable leading without authority, and brings strong experience in tapeout planning and wafer execution.
Responsibilities
- Serve as the primary program interface for foundry interactions, including, reticle and wafer planning coordination, pre- and post-tapeout run setup and execution tracking, volume planning and demand forecast alignment, and process node updates and communication of impact to internal teams.
- Chair and lead weekly, bi-weekly, and monthly cadence meetings with foundries.
- Manage and drive closure of foundry cases, tickets, and technical escalations.
- Ensure alignment on lot priorities (e.g., hot/expedite vs standard), and tapeout readiness and mask schedules.
Milestone Tracking & Execution Rigor
- Track and manage project/program milestones, including, design readiness gates, and tapeout milestones.
- Drive accountability for schedule adherence and deliverables.
- Establish and manage custom trackers to highlight blockers early, and enable rapid decision-making.
- Lead recurring execution reviews to ensure unblocked progress toward tapeout.
- Perform continuous risk analysis at every stage of the program lifecycle.
- Identify, quantify, and actively manage technical risks (design, layout, process), and schedule and dependency risks.
- Drive mitigation planning and execution.
- Proactively escalate critical risks with clear mitigation strategies.
- Coordinate resolution of issues raised by design leads, layout leads and foundry partners.
Tapeout Readiness & Execution
- Own tapeout (TO) schedule orchestration, including, weekly/frequent TO readiness meetings, and cross-functional dependency tracking.
- Ensure no blockers exist prior to GDS release and mask submission.
- Drive alignment on design closure timelines, layout completion, and foundry readiness.
Required Qualifications
- 5+ years of experience in semiconductor program management, or semiconductor operational management.
- Experience working with wafer foundries.
- Strong understanding of tapeout lifecycle (pre-TO, TO, post-TO), foundry operations, wafer planning, reticle management, and ASIC design flow (RTL → Layout → GDS → Silicon).
Preferred Qualifications
- Familiarity with advanced packaging flows and OSAT interactions
- Prior involvement in multi-program or portfolio-level tracking environments
Candidates must be authorized to work in the U.S. now and in the future without employer sponsorship.
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