Engineer, Senior Staff|6245 Engineer, Senior Staff|6245

Job Description: * Power user of industry standard Physical Design & Verifaction tools.Innovus,FirstEncounter,ICC, etc.

• Strong hands-on experience in floorplanning, clock tree synthesis, timing closure, signal integrity, IR drop analysis, ECO implementation, and physical design verification
• Experience in Technologie nodess: 28nm,14nm 7nm.
• Solid Understanding of scripting languages such as Perl/Tcl.
• Solid understanding of Extraction and STA methodology and tools.
• Solid understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.
• Ability to work in teams and collaborate effectively with people in different functions
• Excellent verbal and written communication skills are required.
• Self Motivator and excellent problem solving skills.