Micron Technology, Inc. seeks engineers with CMOS circuit knowledge and DRAM experience to advance test flows and defect analysis. You will collaborate in a team to develop strategies for DRAM Design-for-Test (DFT), recognize fail patterns, and improve test efficiency while maintaining quality.
A background in Python/Java/C/C++ and analytical lab work is expected. The role emphasizes innovation in DFT and solving high-visibility DRAM issues, with opportunities to develop supporting software
#J-18808-LjbffrDRAM DFT Engineer – Test Flow & Analytics in boise at Unknown Company
This position is listed as full time and onsite.