Apple Inc. in Cupertino is seeking a DRAM Design Validation Engineer to help design and integrate DRAM memories with SoCs, ensuring high performance and power efficiency across Apple devices.
You will work with design, verification and integration teams to define memory controller and DDR-PHY requirements, collaborating with vendors to validate LPDDR interfaces and achieve reliable, low-power operation.
#J-18808-LjbffrDRAM Design Validation Engineer — SoC Memory Expert, Equity in cupertino at Unknown Company
This position is listed as full time and onsite.