Unknown Company

Distinguished Engineer – End-to-End Scaling Performance Architecture

california, mo • Posted 6 days ago
Onsite Full Time Engineering

  • Define the multi-generation strategy for application scaling across DRAM, NVLink, C2C, compute, and the supporting software stack.
  • Translate the behavior of important AI, HPC, and accelerated computing applications into architectural requirements, performance targets, and investment priorities.
  • Build a clear view of how bottlenecks shift as workloads scale across dies, GPUs, nodes, model sizes, data sets, and communication patterns.
  • Evaluate system-level trade-offs across bandwidth, latency, capacity, topology, coherence, power, area, cost, programmability, and resiliency.
  • Establish common workload scenarios, scaling metrics, models, and decision frameworks.
  • Identify architectural discontinuities and emerging technology opportunities.

Requirements

  • MSEE, MSCE, PhD, or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 18+ years of relevant industry or academic experience, including experience setting architecture direction for complex, high-performance systems.
  • Deep understanding of system performance and scaling, including interactions among DRAM behavior, high-bandwidth fabrics such as NVLink, and C2C communication.
  • Strong application-level intuition, including the ability to connect workload algorithms, parallelism, communication, locality, and data movement to architecture choices and measurable outcomes.
  • Experience with workload characterization, analytical or simulation-based performance modeling, bottleneck analysis, and architecture trade-off evaluation.
  • Demonstrated ability to create and advance a multi-generation technical strategy through influence across silicon, systems, software, and application teams.
  • Clear communication and sound judgment in ambiguous technical areas, with the ability to explain complex system trade-offs to specialists and executive leaders.
  • Experience mentoring senior engineers into broader architecture leadership roles and building strong technical communities.

Core Competencies

Expertise in defining multi-generation strategies for application scaling, with a strong focus on system performance, workload characterization, and architectural trade-offs. Proven ability to influence cross-functional teams and mentor engineers in high-performance computing environments.

Highest-signal resume keywords

  • Multi-Generation Strategy Development
  • System Performance Analysis
  • Workload Characterization
  • Architectural Trade-Off Evaluation
  • Mentoring and Leadership

ATS Optimization Keywords

Hard Skills

  • DRAM Behavior Analysis
  • NVLink Communication
  • C2C Communication
  • Performance Modeling
  • Bottleneck Analysis
  • Scaling Metrics
  • Analytical Simulation
  • Architecture Direction
  • Technical Strategy Development
  • High-Performance Systems Design

Soft Skills

  • Clear Communication
  • Sound Judgment
  • Influence Across Teams
  • Mentoring
  • Building Technical Communities

Certifications & Qualifications

  • MSEE
  • MSCE
  • PhD

Industry Keywords

  • AI Applications
  • HPC
  • Accelerated Computing
  • System-Level Trade-Offs
  • Performance Targets
  • Investment Priorities
  • Workload Algorithms
  • Data Movement
  • Technical Communities
  • Emerging Technology Opportunities

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