Renesas Electronics Corporation is seeking a senior-level packaging leader in California to drive technology development for power SiP and module packaging. You will oversee NPI, R&D, and supplier collaboration with OSAT/CM to optimize processes and qualify new package families.
The role requires 15–20 years of experience in power packaging, deep knowledge of wafer-level and flip-chip methods, and the ability to translate roadmap concepts into robust production specifications.
#J-18808-LjbffrDirector, Power Package Design & Wafer-Level Packaging in san jose at Unknown Company
This position is listed as full time and onsite.