Renesas is seeking a seasoned packaging engineer to lead Package Technology Development/NPI and R&D for AI/datacenter power packaging, including Smart Power Stages, vertical power stages and power modules. The role focuses on wafer‑level, flip‑chip and multi‑chip module concepts with OSAT/CM coordination.
You will collaborate with Product, Quality and Operations to define processes, qualify new packages, and drive ramp‑up and production controls.
#J-18808-LjbffrDirector of Power Packaging Engineering (SiP/WLP) in phoenix at Unknown Company
This position is listed as full time and onsite.