Hewlett Packard Enterprise is seeking a Director of ASIC Design & Front-End Implementation to lead RTL design and tapeout readiness for next-gen networking ASICs. You’ll partner with Architecture, Verification, Emulation, Software, and Product teams to ensure milestones are met while optimizing performance, power and area.
You will manage multidisciplinary teams, drive design reviews, and advance methodologies to enable successful silicon production and market delivery.
#J-18808-Ljbffr