Do you have a passion for crafting entirely new solutions? As part of ourDigital Design Engineering group, you’ll take imaginative and revolutionaryideas and determine how to turn them into reality! You and your team will applyengineering fundamentals and start from scratch if needed, bringingforward-thinking ideas to the real world. Join us, and you’ll help design thetools that allow us to bring customers experiences they’ve never beforeenvisioned. You will be part of an exciting silicon design group that isresponsible for designing state-of-the-art ASICs. We have an extraordinaryopportunity for Digital Layout Designers! In this highly visible role, you willbe a member of Apple’s custom layout team, working on the latest technologynodes to create extraordinary custom digital macros, libraries, etc. This is afast paced work environment with endless learning opportunities working in thedesign team with members of integration, CAD, circuit and technologyengineering.
DESCRIPTION
Imagine yourself at the center of our SOC design effort, collaborating with allfields, playing a strategic role of getting functional products to millions ofcustomers quickly. You will have the opportunity to integrate and come-up withnew ideas, as well as work with a team of hardworking engineers. As a member ofthe layout team of the microprocessor group, you will be responsible to deliverPDV clean layout, including the following:
- Designing complex custom layout for digital circuits in deep SubMicron CMOS technologies.
- Reviewing and analyzing floorplans and complex circuits with circuit designers.
- Running a complete set of layout design verification tools available on megacells completed.
- Working with the circuit design team to plan, schedule work and negotiate layout tradeoffs as needed.
- Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts.
- Exceed engineering specifications and expectations.
- Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits.
MINIMUM QUALIFICATIONS
Bachelors degree in relevant field of study plus 10 years of relevant experience
PREFERRED QUALIFICATIONS
We are looking for applicants experience in custom layout design of deepSubMicron CMOS circuits. High level proficiency in layout floorplanning,standard cell planning and hierarchical layout assembly. Good understanding ofissues with RC delay, electromigration, self heating and cross capacitance.Recognize failure prone layout structures, dedicatedly work with designers forthe best approach to problems. Excellent communication skills and able to workwith multi-functional teams. Great skills on interpretation of CALIBRE DRC, ERC,LVS, etc. reports. Knowledge of MENTOR GRAPHICS or CADENCE layout toolsScripting skills in CSH, PERL or SKILL are considered a plus, but not required.Experience in layout automation is considered a plus, but not required.Experience in memory compiler development is considered a plus, but notrequired. Experience designing low noise, low power datapaths or Memory layoutstructures, etc.
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