Digital Design Engineer

Job Description

The candidate will work with team-based VHDL development processes for FPGA-based designs; these include VHDL development, simulation, verification, synthesis, timing closure, and hardware-based acceleration.

Requirements

• In-depth knowledge of Xilinx Virtex FPGAs and Versal MPSoC.
• The candidate must be able to function proficiently in an exclusive UNIX-based environment.
• In-depth knowledge of UNIX-based scripting.
• Xilinx ISE and Vivado experience.
• Modelsim/Questa experience.
• Laboratory test equipment, network test equipment.
• Source code/revision control tools.
• Implementation experience with JESD204B and JESD204C interfaces and realization of high-performance DSP algorithms is a must.
• Should be able to develop implementation architectures from requirements documents or high-level specifications/descriptions; use and maintain legacy IP and build environments; troubleshoot designs operating within an integrated system.
• Experience with DDR3 and DDR4 memory, terrestrial network standards, and design and debug of complex circuit boards.
• VHDL proficiency.
• High-speed digital design and lab debug.
• 10Gbe experience.
• High-speed networking protocol knowledge.
• Background in space.
• Proven track record delivering hardware and signal processing.
• Excellent verbal and written communication skills, with the ability to work in a high-functioning design team.

Preferred Skills

• Knowledge of Matlab, Perl, TCL, System C, System Verilog.

Onsite Requirement

This position is 90-100% onsite. The candidate should be prepared to be onsite just about every day with some limited flexibility due to the nature of the hardware that they will be working on.

Interview Process

Initial phone/zoom interview followed by an in-person interview (candidate must be local to interview in-person).

Must Have

Degree Level

• Bachelor's Degree

Design

• Experience creating and maintaining accurate and detailed design files.
• Experience with complex, high-speed HDL-based implementations of algorithms.
• Experience with design/HDL analysis, including high speed and low power design.
• Performing basic design calculations.

Electrical/Electronics

• Electrical/Electronics – Digital.
• New Circuit Characterization and Qualification.
• New Circuit Debug.
• Xilinx FPGA.

Hardware

• 1G - 100G Ethernet protocol realization.

Programming

• VHDL / Verilog.
• Xilinx DSP.

Signal Processing

• Digital Signal Processing.

Systems

• Space Systems.

Nice to Have

Hardware

• Real-Time Embedded Systems (RTOS, VxWorks, Xenomai, Linux).

Programming

• C/C++ Programming.
• Scripting Languages: Perl, Python, Shell Scripting, PowerShell.

Duration

36 months.

Security Clearance Requirement

No.

Security Clearance Level

Interim to Start.