Qualcomm is seeking skilled RTL and ASIC design engineers to join the Mixed-Signal IP team. This role involves architecting, designing, and validating complex mixed-signal IP blocks, contributing to Qualcomm’s diverse product portfolio.
The ideal candidate should possess a Master's degree in Electrical Engineering and have at least 3 years of experience in RTL and ASIC design, working closely with other teams to ensure successful integration and performance.
#J-18808-LjbffrDigital ASIC Design Engineer - Mixed-Signal IPs (DAC/ADC/PLL) in san diego at Unknown Company
This position is listed as full time and onsite.