We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it.
As a Design Verification intern in this group, you will be responsible for:
- Developing detailed verification plans while working closely with the design and system team to ensure pre- silicon verification success
- Developing test benches, tests and simulations to DUT behavior
- Running coverage regressions to meet the defined coverage goals for SystemVerilog functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage.
- Tracking and communicating verification status, issues, and concerns
- Work with regression tools and develop scripts to submit cases for regression analysis
- Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits.
- Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus.
- Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows
Put your talent to work with us as a Design Engineer Intern – change the world, love your job!
#J-18808-LjbffrDesign Verification Engineering Intern - MS/PhD in dallas at Unknown Company
- Typical pay
- $71,760–$109,200
For context, most registered nurses earn between $71,760–$109,200 a year according to Bureau of Labor Statistics wage data. What this particular role pays is set by the employer — check the description above.
This position is listed as full time and onsite.