Unknown Company

Design Verification Engineer: SystemVerilog/UVM & SoCs

austin, tx • Posted 3 weeks ago
Onsite Full Time Engineering
Amazon in Austin, Texas is seeking a Design Verification Engineer to ensure hardware and software solutions meet functionality standards. Responsibilities include developing comprehensive verification plans and measuring team metrics. Ideal candidates should have a Bachelor's degree in Electrical Engineering or a related field, along with over 3 years of experience in design verification using System Verilog and UVM. Competitive salary ranging from $136,000 to $184,000 annually, alongside substantial benefits including health insurance, parental leave, and retirement plans.
#J-18808-Ljbffr

Design Verification Engineer: SystemVerilog/UVM & SoCs in austin at Unknown Company

This position is listed as full time and onsite.

Back to Job Search