Redolent Infotech Pvt. Ltd. in Austin, TX is seeking a Design Verification Engineer (Strong OVM) on a contract basis. Location is Austin, TX, with a 6 to 12+ month engagement and DOE compensation. The role demands expertise in OVM, UVM, and SystemVerilog test benches for full-chip verification.
You will work with simulation tools such as VCS, Cadence IES, and related environments to validate ASIC/SoC designs, including memory interfaces and PCIe verification.
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