Etched is seeking a Design Verification Engineer to join our Internal IP DV team in San Jose. You will verify custom IP cores powering our chips, including systolic arrays, DMAs, and NoCs, ensuring robustness, high performance, and silicon readiness.
You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate the full hardware-software stack, build UVM/testbenches, and contribute to DV infrastructure and coverage models.
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