River AI Inc. is seeking exception design verification engineers to ensure our high-performance custom silicon is functionally correct.
Starting from architectural definitions, you will define test benches and verification environments across simulation, formal, and emulation methods, collaborating with RTL, performance modeling, and compiler teams. You will build scalable UVM environments, develop constrained-random tests, implement coverage models, use formal methods where applicable, and
#J-18808-LjbffrDesign Verification Engineer - Hardware for AI Accelerators in palo alto at Unknown Company
This position is listed as full time and onsite.