Unknown Company

Design Verification Engineer

austin, tx • Posted 4 days ago
Onsite Full Time Engineering

This is Fulltime/Permanent role

We need a DV engineer for AMD who has AI experienc

Responsibilities

  • Strong understanding of SV and UVM and good debugging skills
  • Understanding of AMBA protocols
  • Understand design specs and develop test plans based on functional and architectural requirements
  • Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing
  • Develop directed and random testcases, perform coverage analysis, and close functional/code coverage
  • Debug simulation failures and work closely with RTL designers to resolve issues
  • Execute regression runs, analyze results, and contribute to continuous improvement
  • Integrate and run power-aware simulations, low power checks, and work with UPF/CPF as needed
  • Collaborate with DFT/PD/RTL teams and post-silicon validation to ensure design quality across domains
  • Document test environments, testplans, and results for internal and external reviews

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