Design Verification Engineer — AI/ML SoC IP

Meta Platforms, Inc. is looking for a Design Verification Engineer to validate new core IP implementations and develop testing infrastructure. This role requires 5+ years of experience in digital design verification, collaboration with researchers and architects, and hands-on skills in Verilog and SystemVerilog.

The successful candidate will enhance design quality through continuous improvements and work closely with cross-functional teams. This position is based in Austin, Texas, and offers a competitive salary package.